The CCITT/ISO committee has standardized a set of compression and decompression algorithms for still and motion digital video, such as is described, for example, in ISO/IEC JTC1/SC29/WG11 N0702 (revised), May 10, 1994. These standards include the JPEG, MPEG and H.261 compression schemes. These standards are commonly applied in video conferencing, CD-ROM or DVD-ROM based interactive videos for education and entertajinent, video or informational kiosks, video on demand (VOD) applications, satellite video transmission applications and many other applications which require communication of motion digital video. These standards utilize transform code compressed domain formats, which include the Discrete Cosine transform (DCT), and the interframe predictive code format. Motion Compensation (MC) algorithms are used in conjunction with the DCT format and other hybrid compressed formats.
The MPEG standard was drafted by the Moving Picture Coding Experts Group (MPEG) which operates within the framework of the Joint ISO/IEC Technical Committee (JCCI) on Information Technology. The draft provided a standard for coded representation of moving pictures, audio and their combination.
FIG. 1 is a block diagram depicting a typical prior art computer system suitable for decoding MPEG video data. Computer system 10 includes standard system components, such as system bus 11, CPU 12, core logic 13, system memory 14, and hard disk 16. Computer system 10 also includes a number of elements particularly suitable for video functions, including DVD-ROM drive 15, which reads CD-ROM or DVD-ROM, MPEG decoder 17 and its associated local DRAM memory 17A, 2D/3D Graphics Controller 18, and its associated local frame buffer DRAM 18A. If desired, computer system 10 also includes a television interface 19 for displaying video on a television, and RGB output bus for providing video output signals to a monitor. These video output signals on bus 20 are either MPEG data streams from DVD-ROM drive 15, or typical computer graphics generated by Graphics Controller 18, or both. Graphics Controller 18 also provides 2-D, 3-D graphics functionality as well as video scaling and color space conversion. In addition, Graphics Controller 18 provides an interface via bus 20 to a RGB monitor or a television serving to display video data from computer system 10.
In FIG. 1, decoder 17 performs MPEG video data stream decompression/decoding operation, thus enabling computer system 10 to playback multimedia applications utilizing the MPEG 1 or MPEG 2 video compression standard. The MPEG video decoding operation includes the tasks of parsing the compressed video stream using variable length decoding (VLD), inverse quantization (IQ), inverse discrete cosine transformation (IDCT), motion compensation (MC) and block reconstruction (BR). Since the video decoding operation involves compute intensive signal processing operations, the hardware logic embedded in MPEG decoder 17 is complex and consequently expensive. Another disadvantage of the prior art setup is that MPEG decoder 17 fails to utilize computational and memory resources provided by system components such as CPU 12, system memory 14, or Graphics Controller 18 and its associated memory 18a. This results in inefficient utilization of the available system resources.